
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 07:30:48 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fnmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fnmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fnmadd_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_6903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x32800001; valaddr_reg:x12; val_offset:20646*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20646*FLEN/8, x13, x9, x10)

inst_6904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:20649*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20649*FLEN/8, x13, x9, x10)

inst_6905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3f800007; valaddr_reg:x12; val_offset:20652*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20652*FLEN/8, x13, x9, x10)

inst_6906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:20655*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20655*FLEN/8, x13, x9, x10)

inst_6907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3f800003; valaddr_reg:x12; val_offset:20658*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20658*FLEN/8, x13, x9, x10)

inst_6908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:20661*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20661*FLEN/8, x13, x9, x10)

inst_6909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3f800001; valaddr_reg:x12; val_offset:20664*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20664*FLEN/8, x13, x9, x10)

inst_6910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:20667*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20667*FLEN/8, x13, x9, x10)

inst_6911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:20670*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20670*FLEN/8, x13, x9, x10)

inst_6912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3f999999; valaddr_reg:x12; val_offset:20673*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20673*FLEN/8, x13, x9, x10)

inst_6913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:20676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20676*FLEN/8, x13, x9, x10)

inst_6914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:20679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20679*FLEN/8, x13, x9, x10)

inst_6915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:20682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20682*FLEN/8, x13, x9, x10)

inst_6916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:20685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20685*FLEN/8, x13, x9, x10)

inst_6917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:20688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20688*FLEN/8, x13, x9, x10)

inst_6918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:20691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20691*FLEN/8, x13, x9, x10)

inst_6919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73fb84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x432701 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3fb84; op2val:0x432701;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:20694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20694*FLEN/8, x13, x9, x10)

inst_6920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33000000; valaddr_reg:x12; val_offset:20697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20697*FLEN/8, x13, x9, x10)

inst_6921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337fffff; valaddr_reg:x12; val_offset:20700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20700*FLEN/8, x13, x9, x10)

inst_6922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33400000; valaddr_reg:x12; val_offset:20703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20703*FLEN/8, x13, x9, x10)

inst_6923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x333fffff; valaddr_reg:x12; val_offset:20706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20706*FLEN/8, x13, x9, x10)

inst_6924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33600000; valaddr_reg:x12; val_offset:20709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20709*FLEN/8, x13, x9, x10)

inst_6925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x331fffff; valaddr_reg:x12; val_offset:20712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20712*FLEN/8, x13, x9, x10)

inst_6926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33700000; valaddr_reg:x12; val_offset:20715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20715*FLEN/8, x13, x9, x10)

inst_6927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x330fffff; valaddr_reg:x12; val_offset:20718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20718*FLEN/8, x13, x9, x10)

inst_6928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33780000; valaddr_reg:x12; val_offset:20721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20721*FLEN/8, x13, x9, x10)

inst_6929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3307ffff; valaddr_reg:x12; val_offset:20724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20724*FLEN/8, x13, x9, x10)

inst_6930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337c0000; valaddr_reg:x12; val_offset:20727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20727*FLEN/8, x13, x9, x10)

inst_6931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3303ffff; valaddr_reg:x12; val_offset:20730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20730*FLEN/8, x13, x9, x10)

inst_6932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337e0000; valaddr_reg:x12; val_offset:20733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20733*FLEN/8, x13, x9, x10)

inst_6933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3301ffff; valaddr_reg:x12; val_offset:20736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20736*FLEN/8, x13, x9, x10)

inst_6934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337f0000; valaddr_reg:x12; val_offset:20739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20739*FLEN/8, x13, x9, x10)

inst_6935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3300ffff; valaddr_reg:x12; val_offset:20742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20742*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_54)
inst_6936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337f8000; valaddr_reg:x12; val_offset:20745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20745*FLEN/8, x13, x9, x10)

inst_6937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33007fff; valaddr_reg:x12; val_offset:20748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20748*FLEN/8, x13, x9, x10)

inst_6938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337fc000; valaddr_reg:x12; val_offset:20751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20751*FLEN/8, x13, x9, x10)

inst_6939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33003fff; valaddr_reg:x12; val_offset:20754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20754*FLEN/8, x13, x9, x10)

inst_6940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337fe000; valaddr_reg:x12; val_offset:20757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20757*FLEN/8, x13, x9, x10)

inst_6941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33001fff; valaddr_reg:x12; val_offset:20760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20760*FLEN/8, x13, x9, x10)

inst_6942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337ff000; valaddr_reg:x12; val_offset:20763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20763*FLEN/8, x13, x9, x10)

inst_6943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33000fff; valaddr_reg:x12; val_offset:20766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20766*FLEN/8, x13, x9, x10)

inst_6944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337ff800; valaddr_reg:x12; val_offset:20769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20769*FLEN/8, x13, x9, x10)

inst_6945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x330007ff; valaddr_reg:x12; val_offset:20772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20772*FLEN/8, x13, x9, x10)

inst_6946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337ffc00; valaddr_reg:x12; val_offset:20775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20775*FLEN/8, x13, x9, x10)

inst_6947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x330003ff; valaddr_reg:x12; val_offset:20778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20778*FLEN/8, x13, x9, x10)

inst_6948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337ffe00; valaddr_reg:x12; val_offset:20781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20781*FLEN/8, x13, x9, x10)

inst_6949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x330001ff; valaddr_reg:x12; val_offset:20784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20784*FLEN/8, x13, x9, x10)

inst_6950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337fff00; valaddr_reg:x12; val_offset:20787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20787*FLEN/8, x13, x9, x10)

inst_6951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x330000ff; valaddr_reg:x12; val_offset:20790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20790*FLEN/8, x13, x9, x10)

inst_6952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337fff80; valaddr_reg:x12; val_offset:20793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20793*FLEN/8, x13, x9, x10)

inst_6953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3300007f; valaddr_reg:x12; val_offset:20796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20796*FLEN/8, x13, x9, x10)

inst_6954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337fffc0; valaddr_reg:x12; val_offset:20799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20799*FLEN/8, x13, x9, x10)

inst_6955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3300003f; valaddr_reg:x12; val_offset:20802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20802*FLEN/8, x13, x9, x10)

inst_6956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337fffe0; valaddr_reg:x12; val_offset:20805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20805*FLEN/8, x13, x9, x10)

inst_6957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3300001f; valaddr_reg:x12; val_offset:20808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20808*FLEN/8, x13, x9, x10)

inst_6958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337ffff0; valaddr_reg:x12; val_offset:20811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20811*FLEN/8, x13, x9, x10)

inst_6959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3300000f; valaddr_reg:x12; val_offset:20814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20814*FLEN/8, x13, x9, x10)

inst_6960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337ffff8; valaddr_reg:x12; val_offset:20817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20817*FLEN/8, x13, x9, x10)

inst_6961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33000007; valaddr_reg:x12; val_offset:20820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20820*FLEN/8, x13, x9, x10)

inst_6962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337ffffc; valaddr_reg:x12; val_offset:20823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20823*FLEN/8, x13, x9, x10)

inst_6963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33000003; valaddr_reg:x12; val_offset:20826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20826*FLEN/8, x13, x9, x10)

inst_6964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x337ffffe; valaddr_reg:x12; val_offset:20829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20829*FLEN/8, x13, x9, x10)

inst_6965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x33000001; valaddr_reg:x12; val_offset:20832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20832*FLEN/8, x13, x9, x10)

inst_6966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:20835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20835*FLEN/8, x13, x9, x10)

inst_6967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3f800007; valaddr_reg:x12; val_offset:20838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20838*FLEN/8, x13, x9, x10)

inst_6968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:20841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20841*FLEN/8, x13, x9, x10)

inst_6969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3f800003; valaddr_reg:x12; val_offset:20844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20844*FLEN/8, x13, x9, x10)

inst_6970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:20847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20847*FLEN/8, x13, x9, x10)

inst_6971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3f800001; valaddr_reg:x12; val_offset:20850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20850*FLEN/8, x13, x9, x10)

inst_6972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:20853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20853*FLEN/8, x13, x9, x10)

inst_6973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:20856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20856*FLEN/8, x13, x9, x10)

inst_6974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3f999999; valaddr_reg:x12; val_offset:20859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20859*FLEN/8, x13, x9, x10)

inst_6975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:20862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20862*FLEN/8, x13, x9, x10)

inst_6976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:20865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20865*FLEN/8, x13, x9, x10)

inst_6977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:20868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20868*FLEN/8, x13, x9, x10)

inst_6978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:20871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20871*FLEN/8, x13, x9, x10)

inst_6979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:20874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20874*FLEN/8, x13, x9, x10)

inst_6980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:20877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20877*FLEN/8, x13, x9, x10)

inst_6981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x537d8a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d7820 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed37d8a; op2val:0x4d7820;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:20880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20880*FLEN/8, x13, x9, x10)

inst_6982:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33800000; valaddr_reg:x12; val_offset:20883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20883*FLEN/8, x13, x9, x10)

inst_6983:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ffffff; valaddr_reg:x12; val_offset:20886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20886*FLEN/8, x13, x9, x10)

inst_6984:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33c00000; valaddr_reg:x12; val_offset:20889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20889*FLEN/8, x13, x9, x10)

inst_6985:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33bfffff; valaddr_reg:x12; val_offset:20892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20892*FLEN/8, x13, x9, x10)

inst_6986:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33e00000; valaddr_reg:x12; val_offset:20895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20895*FLEN/8, x13, x9, x10)

inst_6987:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x339fffff; valaddr_reg:x12; val_offset:20898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20898*FLEN/8, x13, x9, x10)

inst_6988:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33f00000; valaddr_reg:x12; val_offset:20901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20901*FLEN/8, x13, x9, x10)

inst_6989:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x338fffff; valaddr_reg:x12; val_offset:20904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20904*FLEN/8, x13, x9, x10)

inst_6990:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33f80000; valaddr_reg:x12; val_offset:20907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20907*FLEN/8, x13, x9, x10)

inst_6991:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3387ffff; valaddr_reg:x12; val_offset:20910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20910*FLEN/8, x13, x9, x10)

inst_6992:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fc0000; valaddr_reg:x12; val_offset:20913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20913*FLEN/8, x13, x9, x10)

inst_6993:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3383ffff; valaddr_reg:x12; val_offset:20916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20916*FLEN/8, x13, x9, x10)

inst_6994:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fe0000; valaddr_reg:x12; val_offset:20919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20919*FLEN/8, x13, x9, x10)

inst_6995:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3381ffff; valaddr_reg:x12; val_offset:20922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20922*FLEN/8, x13, x9, x10)

inst_6996:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ff0000; valaddr_reg:x12; val_offset:20925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20925*FLEN/8, x13, x9, x10)

inst_6997:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3380ffff; valaddr_reg:x12; val_offset:20928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20928*FLEN/8, x13, x9, x10)

inst_6998:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ff8000; valaddr_reg:x12; val_offset:20931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20931*FLEN/8, x13, x9, x10)

inst_6999:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33807fff; valaddr_reg:x12; val_offset:20934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20934*FLEN/8, x13, x9, x10)

inst_7000:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ffc000; valaddr_reg:x12; val_offset:20937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20937*FLEN/8, x13, x9, x10)

inst_7001:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33803fff; valaddr_reg:x12; val_offset:20940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20940*FLEN/8, x13, x9, x10)

inst_7002:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ffe000; valaddr_reg:x12; val_offset:20943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20943*FLEN/8, x13, x9, x10)

inst_7003:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33801fff; valaddr_reg:x12; val_offset:20946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20946*FLEN/8, x13, x9, x10)

inst_7004:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fff000; valaddr_reg:x12; val_offset:20949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20949*FLEN/8, x13, x9, x10)

inst_7005:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33800fff; valaddr_reg:x12; val_offset:20952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20952*FLEN/8, x13, x9, x10)

inst_7006:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fff800; valaddr_reg:x12; val_offset:20955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20955*FLEN/8, x13, x9, x10)

inst_7007:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x338007ff; valaddr_reg:x12; val_offset:20958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20958*FLEN/8, x13, x9, x10)

inst_7008:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fffc00; valaddr_reg:x12; val_offset:20961*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20961*FLEN/8, x13, x9, x10)

inst_7009:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x338003ff; valaddr_reg:x12; val_offset:20964*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20964*FLEN/8, x13, x9, x10)

inst_7010:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fffe00; valaddr_reg:x12; val_offset:20967*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20967*FLEN/8, x13, x9, x10)

inst_7011:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x338001ff; valaddr_reg:x12; val_offset:20970*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20970*FLEN/8, x13, x9, x10)

inst_7012:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ffff00; valaddr_reg:x12; val_offset:20973*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20973*FLEN/8, x13, x9, x10)

inst_7013:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x338000ff; valaddr_reg:x12; val_offset:20976*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20976*FLEN/8, x13, x9, x10)

inst_7014:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ffff80; valaddr_reg:x12; val_offset:20979*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20979*FLEN/8, x13, x9, x10)

inst_7015:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3380007f; valaddr_reg:x12; val_offset:20982*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20982*FLEN/8, x13, x9, x10)

inst_7016:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ffffc0; valaddr_reg:x12; val_offset:20985*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20985*FLEN/8, x13, x9, x10)

inst_7017:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3380003f; valaddr_reg:x12; val_offset:20988*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20988*FLEN/8, x13, x9, x10)

inst_7018:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33ffffe0; valaddr_reg:x12; val_offset:20991*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20991*FLEN/8, x13, x9, x10)

inst_7019:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3380001f; valaddr_reg:x12; val_offset:20994*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20994*FLEN/8, x13, x9, x10)

inst_7020:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fffff0; valaddr_reg:x12; val_offset:20997*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 20997*FLEN/8, x13, x9, x10)

inst_7021:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3380000f; valaddr_reg:x12; val_offset:21000*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21000*FLEN/8, x13, x9, x10)

inst_7022:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fffff8; valaddr_reg:x12; val_offset:21003*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21003*FLEN/8, x13, x9, x10)

inst_7023:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33800007; valaddr_reg:x12; val_offset:21006*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21006*FLEN/8, x13, x9, x10)

inst_7024:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fffffc; valaddr_reg:x12; val_offset:21009*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21009*FLEN/8, x13, x9, x10)

inst_7025:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33800003; valaddr_reg:x12; val_offset:21012*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21012*FLEN/8, x13, x9, x10)

inst_7026:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33fffffe; valaddr_reg:x12; val_offset:21015*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21015*FLEN/8, x13, x9, x10)

inst_7027:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x33800001; valaddr_reg:x12; val_offset:21018*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21018*FLEN/8, x13, x9, x10)

inst_7028:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:21021*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21021*FLEN/8, x13, x9, x10)

inst_7029:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3f800007; valaddr_reg:x12; val_offset:21024*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21024*FLEN/8, x13, x9, x10)

inst_7030:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:21027*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21027*FLEN/8, x13, x9, x10)

inst_7031:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3f800003; valaddr_reg:x12; val_offset:21030*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21030*FLEN/8, x13, x9, x10)

inst_7032:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:21033*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21033*FLEN/8, x13, x9, x10)

inst_7033:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3f800001; valaddr_reg:x12; val_offset:21036*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21036*FLEN/8, x13, x9, x10)

inst_7034:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:21039*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21039*FLEN/8, x13, x9, x10)

inst_7035:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:21042*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21042*FLEN/8, x13, x9, x10)

inst_7036:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3f999999; valaddr_reg:x12; val_offset:21045*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21045*FLEN/8, x13, x9, x10)

inst_7037:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:21048*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21048*FLEN/8, x13, x9, x10)

inst_7038:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:21051*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21051*FLEN/8, x13, x9, x10)

inst_7039:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:21054*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21054*FLEN/8, x13, x9, x10)

inst_7040:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:21057*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21057*FLEN/8, x13, x9, x10)

inst_7041:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:21060*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21060*FLEN/8, x13, x9, x10)

inst_7042:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:21063*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21063*FLEN/8, x13, x9, x10)

inst_7043:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ad793 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6c0254 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0ad793; op2val:0xec0254;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:21066*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21066*FLEN/8, x13, x9, x10)

inst_7044:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34000000; valaddr_reg:x12; val_offset:21069*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21069*FLEN/8, x13, x9, x10)

inst_7045:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347fffff; valaddr_reg:x12; val_offset:21072*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21072*FLEN/8, x13, x9, x10)

inst_7046:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34400000; valaddr_reg:x12; val_offset:21075*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21075*FLEN/8, x13, x9, x10)

inst_7047:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x343fffff; valaddr_reg:x12; val_offset:21078*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21078*FLEN/8, x13, x9, x10)

inst_7048:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34600000; valaddr_reg:x12; val_offset:21081*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21081*FLEN/8, x13, x9, x10)

inst_7049:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x341fffff; valaddr_reg:x12; val_offset:21084*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21084*FLEN/8, x13, x9, x10)

inst_7050:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34700000; valaddr_reg:x12; val_offset:21087*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21087*FLEN/8, x13, x9, x10)

inst_7051:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x340fffff; valaddr_reg:x12; val_offset:21090*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21090*FLEN/8, x13, x9, x10)

inst_7052:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34780000; valaddr_reg:x12; val_offset:21093*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21093*FLEN/8, x13, x9, x10)

inst_7053:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3407ffff; valaddr_reg:x12; val_offset:21096*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21096*FLEN/8, x13, x9, x10)

inst_7054:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347c0000; valaddr_reg:x12; val_offset:21099*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21099*FLEN/8, x13, x9, x10)

inst_7055:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3403ffff; valaddr_reg:x12; val_offset:21102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21102*FLEN/8, x13, x9, x10)

inst_7056:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347e0000; valaddr_reg:x12; val_offset:21105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21105*FLEN/8, x13, x9, x10)

inst_7057:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3401ffff; valaddr_reg:x12; val_offset:21108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21108*FLEN/8, x13, x9, x10)

inst_7058:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347f0000; valaddr_reg:x12; val_offset:21111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21111*FLEN/8, x13, x9, x10)

inst_7059:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3400ffff; valaddr_reg:x12; val_offset:21114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21114*FLEN/8, x13, x9, x10)

inst_7060:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347f8000; valaddr_reg:x12; val_offset:21117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21117*FLEN/8, x13, x9, x10)

inst_7061:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34007fff; valaddr_reg:x12; val_offset:21120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21120*FLEN/8, x13, x9, x10)

inst_7062:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347fc000; valaddr_reg:x12; val_offset:21123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21123*FLEN/8, x13, x9, x10)

inst_7063:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34003fff; valaddr_reg:x12; val_offset:21126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21126*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_55)
inst_7064:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347fe000; valaddr_reg:x12; val_offset:21129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21129*FLEN/8, x13, x9, x10)

inst_7065:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34001fff; valaddr_reg:x12; val_offset:21132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21132*FLEN/8, x13, x9, x10)

inst_7066:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347ff000; valaddr_reg:x12; val_offset:21135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21135*FLEN/8, x13, x9, x10)

inst_7067:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34000fff; valaddr_reg:x12; val_offset:21138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21138*FLEN/8, x13, x9, x10)

inst_7068:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347ff800; valaddr_reg:x12; val_offset:21141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21141*FLEN/8, x13, x9, x10)

inst_7069:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x340007ff; valaddr_reg:x12; val_offset:21144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21144*FLEN/8, x13, x9, x10)

inst_7070:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347ffc00; valaddr_reg:x12; val_offset:21147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21147*FLEN/8, x13, x9, x10)

inst_7071:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x340003ff; valaddr_reg:x12; val_offset:21150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21150*FLEN/8, x13, x9, x10)

inst_7072:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347ffe00; valaddr_reg:x12; val_offset:21153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21153*FLEN/8, x13, x9, x10)

inst_7073:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x340001ff; valaddr_reg:x12; val_offset:21156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21156*FLEN/8, x13, x9, x10)

inst_7074:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347fff00; valaddr_reg:x12; val_offset:21159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21159*FLEN/8, x13, x9, x10)

inst_7075:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x340000ff; valaddr_reg:x12; val_offset:21162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21162*FLEN/8, x13, x9, x10)

inst_7076:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347fff80; valaddr_reg:x12; val_offset:21165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21165*FLEN/8, x13, x9, x10)

inst_7077:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3400007f; valaddr_reg:x12; val_offset:21168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21168*FLEN/8, x13, x9, x10)

inst_7078:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347fffc0; valaddr_reg:x12; val_offset:21171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21171*FLEN/8, x13, x9, x10)

inst_7079:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3400003f; valaddr_reg:x12; val_offset:21174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21174*FLEN/8, x13, x9, x10)

inst_7080:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347fffe0; valaddr_reg:x12; val_offset:21177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21177*FLEN/8, x13, x9, x10)

inst_7081:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3400001f; valaddr_reg:x12; val_offset:21180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21180*FLEN/8, x13, x9, x10)

inst_7082:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347ffff0; valaddr_reg:x12; val_offset:21183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21183*FLEN/8, x13, x9, x10)

inst_7083:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3400000f; valaddr_reg:x12; val_offset:21186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21186*FLEN/8, x13, x9, x10)

inst_7084:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347ffff8; valaddr_reg:x12; val_offset:21189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21189*FLEN/8, x13, x9, x10)

inst_7085:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34000007; valaddr_reg:x12; val_offset:21192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21192*FLEN/8, x13, x9, x10)

inst_7086:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347ffffc; valaddr_reg:x12; val_offset:21195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21195*FLEN/8, x13, x9, x10)

inst_7087:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34000003; valaddr_reg:x12; val_offset:21198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21198*FLEN/8, x13, x9, x10)

inst_7088:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x347ffffe; valaddr_reg:x12; val_offset:21201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21201*FLEN/8, x13, x9, x10)

inst_7089:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x34000001; valaddr_reg:x12; val_offset:21204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21204*FLEN/8, x13, x9, x10)

inst_7090:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:21207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21207*FLEN/8, x13, x9, x10)

inst_7091:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3f800007; valaddr_reg:x12; val_offset:21210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21210*FLEN/8, x13, x9, x10)

inst_7092:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:21213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21213*FLEN/8, x13, x9, x10)

inst_7093:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3f800003; valaddr_reg:x12; val_offset:21216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21216*FLEN/8, x13, x9, x10)

inst_7094:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:21219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21219*FLEN/8, x13, x9, x10)

inst_7095:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3f800001; valaddr_reg:x12; val_offset:21222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21222*FLEN/8, x13, x9, x10)

inst_7096:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:21225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21225*FLEN/8, x13, x9, x10)

inst_7097:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:21228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21228*FLEN/8, x13, x9, x10)

inst_7098:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3f999999; valaddr_reg:x12; val_offset:21231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21231*FLEN/8, x13, x9, x10)

inst_7099:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:21234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21234*FLEN/8, x13, x9, x10)

inst_7100:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:21237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21237*FLEN/8, x13, x9, x10)

inst_7101:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:21240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21240*FLEN/8, x13, x9, x10)

inst_7102:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:21243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21243*FLEN/8, x13, x9, x10)

inst_7103:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:21246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21246*FLEN/8, x13, x9, x10)

inst_7104:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:21249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21249*FLEN/8, x13, x9, x10)

inst_7105:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0cb323 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x68e4a1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8cb323; op2val:0x168e4a1;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:21252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21252*FLEN/8, x13, x9, x10)

inst_7106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34800000; valaddr_reg:x12; val_offset:21255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21255*FLEN/8, x13, x9, x10)

inst_7107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ffffff; valaddr_reg:x12; val_offset:21258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21258*FLEN/8, x13, x9, x10)

inst_7108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34c00000; valaddr_reg:x12; val_offset:21261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21261*FLEN/8, x13, x9, x10)

inst_7109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34bfffff; valaddr_reg:x12; val_offset:21264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21264*FLEN/8, x13, x9, x10)

inst_7110:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34e00000; valaddr_reg:x12; val_offset:21267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21267*FLEN/8, x13, x9, x10)

inst_7111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x349fffff; valaddr_reg:x12; val_offset:21270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21270*FLEN/8, x13, x9, x10)

inst_7112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34f00000; valaddr_reg:x12; val_offset:21273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21273*FLEN/8, x13, x9, x10)

inst_7113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x348fffff; valaddr_reg:x12; val_offset:21276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21276*FLEN/8, x13, x9, x10)

inst_7114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34f80000; valaddr_reg:x12; val_offset:21279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21279*FLEN/8, x13, x9, x10)

inst_7115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3487ffff; valaddr_reg:x12; val_offset:21282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21282*FLEN/8, x13, x9, x10)

inst_7116:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fc0000; valaddr_reg:x12; val_offset:21285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21285*FLEN/8, x13, x9, x10)

inst_7117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3483ffff; valaddr_reg:x12; val_offset:21288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21288*FLEN/8, x13, x9, x10)

inst_7118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fe0000; valaddr_reg:x12; val_offset:21291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21291*FLEN/8, x13, x9, x10)

inst_7119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3481ffff; valaddr_reg:x12; val_offset:21294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21294*FLEN/8, x13, x9, x10)

inst_7120:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ff0000; valaddr_reg:x12; val_offset:21297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21297*FLEN/8, x13, x9, x10)

inst_7121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3480ffff; valaddr_reg:x12; val_offset:21300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21300*FLEN/8, x13, x9, x10)

inst_7122:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ff8000; valaddr_reg:x12; val_offset:21303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21303*FLEN/8, x13, x9, x10)

inst_7123:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34807fff; valaddr_reg:x12; val_offset:21306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21306*FLEN/8, x13, x9, x10)

inst_7124:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ffc000; valaddr_reg:x12; val_offset:21309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21309*FLEN/8, x13, x9, x10)

inst_7125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34803fff; valaddr_reg:x12; val_offset:21312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21312*FLEN/8, x13, x9, x10)

inst_7126:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ffe000; valaddr_reg:x12; val_offset:21315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21315*FLEN/8, x13, x9, x10)

inst_7127:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34801fff; valaddr_reg:x12; val_offset:21318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21318*FLEN/8, x13, x9, x10)

inst_7128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fff000; valaddr_reg:x12; val_offset:21321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21321*FLEN/8, x13, x9, x10)

inst_7129:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34800fff; valaddr_reg:x12; val_offset:21324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21324*FLEN/8, x13, x9, x10)

inst_7130:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fff800; valaddr_reg:x12; val_offset:21327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21327*FLEN/8, x13, x9, x10)

inst_7131:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x348007ff; valaddr_reg:x12; val_offset:21330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21330*FLEN/8, x13, x9, x10)

inst_7132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fffc00; valaddr_reg:x12; val_offset:21333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21333*FLEN/8, x13, x9, x10)

inst_7133:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x348003ff; valaddr_reg:x12; val_offset:21336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21336*FLEN/8, x13, x9, x10)

inst_7134:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fffe00; valaddr_reg:x12; val_offset:21339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21339*FLEN/8, x13, x9, x10)

inst_7135:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x348001ff; valaddr_reg:x12; val_offset:21342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21342*FLEN/8, x13, x9, x10)

inst_7136:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ffff00; valaddr_reg:x12; val_offset:21345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21345*FLEN/8, x13, x9, x10)

inst_7137:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x348000ff; valaddr_reg:x12; val_offset:21348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21348*FLEN/8, x13, x9, x10)

inst_7138:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ffff80; valaddr_reg:x12; val_offset:21351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21351*FLEN/8, x13, x9, x10)

inst_7139:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3480007f; valaddr_reg:x12; val_offset:21354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21354*FLEN/8, x13, x9, x10)

inst_7140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ffffc0; valaddr_reg:x12; val_offset:21357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21357*FLEN/8, x13, x9, x10)

inst_7141:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3480003f; valaddr_reg:x12; val_offset:21360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21360*FLEN/8, x13, x9, x10)

inst_7142:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34ffffe0; valaddr_reg:x12; val_offset:21363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21363*FLEN/8, x13, x9, x10)

inst_7143:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3480001f; valaddr_reg:x12; val_offset:21366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21366*FLEN/8, x13, x9, x10)

inst_7144:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fffff0; valaddr_reg:x12; val_offset:21369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21369*FLEN/8, x13, x9, x10)

inst_7145:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3480000f; valaddr_reg:x12; val_offset:21372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21372*FLEN/8, x13, x9, x10)

inst_7146:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fffff8; valaddr_reg:x12; val_offset:21375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21375*FLEN/8, x13, x9, x10)

inst_7147:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34800007; valaddr_reg:x12; val_offset:21378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21378*FLEN/8, x13, x9, x10)

inst_7148:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fffffc; valaddr_reg:x12; val_offset:21381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21381*FLEN/8, x13, x9, x10)

inst_7149:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34800003; valaddr_reg:x12; val_offset:21384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21384*FLEN/8, x13, x9, x10)

inst_7150:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34fffffe; valaddr_reg:x12; val_offset:21387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21387*FLEN/8, x13, x9, x10)

inst_7151:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x34800001; valaddr_reg:x12; val_offset:21390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21390*FLEN/8, x13, x9, x10)

inst_7152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:21393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21393*FLEN/8, x13, x9, x10)

inst_7153:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3f800007; valaddr_reg:x12; val_offset:21396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21396*FLEN/8, x13, x9, x10)

inst_7154:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:21399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21399*FLEN/8, x13, x9, x10)

inst_7155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3f800003; valaddr_reg:x12; val_offset:21402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21402*FLEN/8, x13, x9, x10)

inst_7156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:21405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21405*FLEN/8, x13, x9, x10)

inst_7157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3f800001; valaddr_reg:x12; val_offset:21408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21408*FLEN/8, x13, x9, x10)

inst_7158:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:21411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21411*FLEN/8, x13, x9, x10)

inst_7159:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:21414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21414*FLEN/8, x13, x9, x10)

inst_7160:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3f999999; valaddr_reg:x12; val_offset:21417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21417*FLEN/8, x13, x9, x10)

inst_7161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:21420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21420*FLEN/8, x13, x9, x10)

inst_7162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:21423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21423*FLEN/8, x13, x9, x10)

inst_7163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:21426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21426*FLEN/8, x13, x9, x10)

inst_7164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:21429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21429*FLEN/8, x13, x9, x10)

inst_7165:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:21432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21432*FLEN/8, x13, x9, x10)

inst_7166:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:21435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21435*FLEN/8, x13, x9, x10)

inst_7167:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53985d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4d6e4d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed3985d; op2val:0x4d6e4d;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:21438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21438*FLEN/8, x13, x9, x10)

inst_7168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35000000; valaddr_reg:x12; val_offset:21441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21441*FLEN/8, x13, x9, x10)

inst_7169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357fffff; valaddr_reg:x12; val_offset:21444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21444*FLEN/8, x13, x9, x10)

inst_7170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35400000; valaddr_reg:x12; val_offset:21447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21447*FLEN/8, x13, x9, x10)

inst_7171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x353fffff; valaddr_reg:x12; val_offset:21450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21450*FLEN/8, x13, x9, x10)

inst_7172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35600000; valaddr_reg:x12; val_offset:21453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21453*FLEN/8, x13, x9, x10)

inst_7173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x351fffff; valaddr_reg:x12; val_offset:21456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21456*FLEN/8, x13, x9, x10)

inst_7174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35700000; valaddr_reg:x12; val_offset:21459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21459*FLEN/8, x13, x9, x10)

inst_7175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x350fffff; valaddr_reg:x12; val_offset:21462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21462*FLEN/8, x13, x9, x10)

inst_7176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35780000; valaddr_reg:x12; val_offset:21465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21465*FLEN/8, x13, x9, x10)

inst_7177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3507ffff; valaddr_reg:x12; val_offset:21468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21468*FLEN/8, x13, x9, x10)

inst_7178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357c0000; valaddr_reg:x12; val_offset:21471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21471*FLEN/8, x13, x9, x10)

inst_7179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3503ffff; valaddr_reg:x12; val_offset:21474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21474*FLEN/8, x13, x9, x10)

inst_7180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357e0000; valaddr_reg:x12; val_offset:21477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21477*FLEN/8, x13, x9, x10)

inst_7181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3501ffff; valaddr_reg:x12; val_offset:21480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21480*FLEN/8, x13, x9, x10)

inst_7182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357f0000; valaddr_reg:x12; val_offset:21483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21483*FLEN/8, x13, x9, x10)

inst_7183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3500ffff; valaddr_reg:x12; val_offset:21486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21486*FLEN/8, x13, x9, x10)

inst_7184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357f8000; valaddr_reg:x12; val_offset:21489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21489*FLEN/8, x13, x9, x10)

inst_7185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35007fff; valaddr_reg:x12; val_offset:21492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21492*FLEN/8, x13, x9, x10)

inst_7186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357fc000; valaddr_reg:x12; val_offset:21495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21495*FLEN/8, x13, x9, x10)

inst_7187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35003fff; valaddr_reg:x12; val_offset:21498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21498*FLEN/8, x13, x9, x10)

inst_7188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357fe000; valaddr_reg:x12; val_offset:21501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21501*FLEN/8, x13, x9, x10)

inst_7189:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35001fff; valaddr_reg:x12; val_offset:21504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21504*FLEN/8, x13, x9, x10)

inst_7190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357ff000; valaddr_reg:x12; val_offset:21507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21507*FLEN/8, x13, x9, x10)

inst_7191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35000fff; valaddr_reg:x12; val_offset:21510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21510*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_56)
inst_7192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357ff800; valaddr_reg:x12; val_offset:21513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21513*FLEN/8, x13, x9, x10)

inst_7193:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x350007ff; valaddr_reg:x12; val_offset:21516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21516*FLEN/8, x13, x9, x10)

inst_7194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357ffc00; valaddr_reg:x12; val_offset:21519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21519*FLEN/8, x13, x9, x10)

inst_7195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x350003ff; valaddr_reg:x12; val_offset:21522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21522*FLEN/8, x13, x9, x10)

inst_7196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357ffe00; valaddr_reg:x12; val_offset:21525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21525*FLEN/8, x13, x9, x10)

inst_7197:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x350001ff; valaddr_reg:x12; val_offset:21528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21528*FLEN/8, x13, x9, x10)

inst_7198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357fff00; valaddr_reg:x12; val_offset:21531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21531*FLEN/8, x13, x9, x10)

inst_7199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x350000ff; valaddr_reg:x12; val_offset:21534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21534*FLEN/8, x13, x9, x10)

inst_7200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357fff80; valaddr_reg:x12; val_offset:21537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21537*FLEN/8, x13, x9, x10)

inst_7201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3500007f; valaddr_reg:x12; val_offset:21540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21540*FLEN/8, x13, x9, x10)

inst_7202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357fffc0; valaddr_reg:x12; val_offset:21543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21543*FLEN/8, x13, x9, x10)

inst_7203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3500003f; valaddr_reg:x12; val_offset:21546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21546*FLEN/8, x13, x9, x10)

inst_7204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357fffe0; valaddr_reg:x12; val_offset:21549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21549*FLEN/8, x13, x9, x10)

inst_7205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3500001f; valaddr_reg:x12; val_offset:21552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21552*FLEN/8, x13, x9, x10)

inst_7206:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357ffff0; valaddr_reg:x12; val_offset:21555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21555*FLEN/8, x13, x9, x10)

inst_7207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3500000f; valaddr_reg:x12; val_offset:21558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21558*FLEN/8, x13, x9, x10)

inst_7208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357ffff8; valaddr_reg:x12; val_offset:21561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21561*FLEN/8, x13, x9, x10)

inst_7209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35000007; valaddr_reg:x12; val_offset:21564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21564*FLEN/8, x13, x9, x10)

inst_7210:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357ffffc; valaddr_reg:x12; val_offset:21567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21567*FLEN/8, x13, x9, x10)

inst_7211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35000003; valaddr_reg:x12; val_offset:21570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21570*FLEN/8, x13, x9, x10)

inst_7212:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x357ffffe; valaddr_reg:x12; val_offset:21573*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21573*FLEN/8, x13, x9, x10)

inst_7213:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x35000001; valaddr_reg:x12; val_offset:21576*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21576*FLEN/8, x13, x9, x10)

inst_7214:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:21579*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21579*FLEN/8, x13, x9, x10)

inst_7215:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3f800007; valaddr_reg:x12; val_offset:21582*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21582*FLEN/8, x13, x9, x10)

inst_7216:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:21585*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21585*FLEN/8, x13, x9, x10)

inst_7217:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3f800003; valaddr_reg:x12; val_offset:21588*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21588*FLEN/8, x13, x9, x10)

inst_7218:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:21591*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21591*FLEN/8, x13, x9, x10)

inst_7219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3f800001; valaddr_reg:x12; val_offset:21594*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21594*FLEN/8, x13, x9, x10)

inst_7220:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:21597*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21597*FLEN/8, x13, x9, x10)

inst_7221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:21600*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21600*FLEN/8, x13, x9, x10)

inst_7222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3f999999; valaddr_reg:x12; val_offset:21603*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21603*FLEN/8, x13, x9, x10)

inst_7223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:21606*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21606*FLEN/8, x13, x9, x10)

inst_7224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:21609*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21609*FLEN/8, x13, x9, x10)

inst_7225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:21612*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21612*FLEN/8, x13, x9, x10)

inst_7226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:21615*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21615*FLEN/8, x13, x9, x10)

inst_7227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:21618*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21618*FLEN/8, x13, x9, x10)

inst_7228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:21621*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21621*FLEN/8, x13, x9, x10)

inst_7229:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2371d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x321ef7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2371d1; op2val:0x321ef7;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:21624*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21624*FLEN/8, x13, x9, x10)

inst_7230:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35800000; valaddr_reg:x12; val_offset:21627*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21627*FLEN/8, x13, x9, x10)

inst_7231:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ffffff; valaddr_reg:x12; val_offset:21630*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21630*FLEN/8, x13, x9, x10)

inst_7232:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35c00000; valaddr_reg:x12; val_offset:21633*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21633*FLEN/8, x13, x9, x10)

inst_7233:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35bfffff; valaddr_reg:x12; val_offset:21636*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21636*FLEN/8, x13, x9, x10)

inst_7234:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35e00000; valaddr_reg:x12; val_offset:21639*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21639*FLEN/8, x13, x9, x10)

inst_7235:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x359fffff; valaddr_reg:x12; val_offset:21642*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21642*FLEN/8, x13, x9, x10)

inst_7236:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35f00000; valaddr_reg:x12; val_offset:21645*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21645*FLEN/8, x13, x9, x10)

inst_7237:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x358fffff; valaddr_reg:x12; val_offset:21648*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21648*FLEN/8, x13, x9, x10)

inst_7238:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35f80000; valaddr_reg:x12; val_offset:21651*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21651*FLEN/8, x13, x9, x10)

inst_7239:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3587ffff; valaddr_reg:x12; val_offset:21654*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21654*FLEN/8, x13, x9, x10)

inst_7240:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fc0000; valaddr_reg:x12; val_offset:21657*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21657*FLEN/8, x13, x9, x10)

inst_7241:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3583ffff; valaddr_reg:x12; val_offset:21660*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21660*FLEN/8, x13, x9, x10)

inst_7242:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fe0000; valaddr_reg:x12; val_offset:21663*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21663*FLEN/8, x13, x9, x10)

inst_7243:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3581ffff; valaddr_reg:x12; val_offset:21666*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21666*FLEN/8, x13, x9, x10)

inst_7244:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ff0000; valaddr_reg:x12; val_offset:21669*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21669*FLEN/8, x13, x9, x10)

inst_7245:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3580ffff; valaddr_reg:x12; val_offset:21672*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21672*FLEN/8, x13, x9, x10)

inst_7246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ff8000; valaddr_reg:x12; val_offset:21675*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21675*FLEN/8, x13, x9, x10)

inst_7247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35807fff; valaddr_reg:x12; val_offset:21678*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21678*FLEN/8, x13, x9, x10)

inst_7248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ffc000; valaddr_reg:x12; val_offset:21681*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21681*FLEN/8, x13, x9, x10)

inst_7249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35803fff; valaddr_reg:x12; val_offset:21684*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21684*FLEN/8, x13, x9, x10)

inst_7250:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ffe000; valaddr_reg:x12; val_offset:21687*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21687*FLEN/8, x13, x9, x10)

inst_7251:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35801fff; valaddr_reg:x12; val_offset:21690*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21690*FLEN/8, x13, x9, x10)

inst_7252:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fff000; valaddr_reg:x12; val_offset:21693*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21693*FLEN/8, x13, x9, x10)

inst_7253:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35800fff; valaddr_reg:x12; val_offset:21696*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21696*FLEN/8, x13, x9, x10)

inst_7254:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fff800; valaddr_reg:x12; val_offset:21699*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21699*FLEN/8, x13, x9, x10)

inst_7255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x358007ff; valaddr_reg:x12; val_offset:21702*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21702*FLEN/8, x13, x9, x10)

inst_7256:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fffc00; valaddr_reg:x12; val_offset:21705*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21705*FLEN/8, x13, x9, x10)

inst_7257:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x358003ff; valaddr_reg:x12; val_offset:21708*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21708*FLEN/8, x13, x9, x10)

inst_7258:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fffe00; valaddr_reg:x12; val_offset:21711*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21711*FLEN/8, x13, x9, x10)

inst_7259:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x358001ff; valaddr_reg:x12; val_offset:21714*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21714*FLEN/8, x13, x9, x10)

inst_7260:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ffff00; valaddr_reg:x12; val_offset:21717*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21717*FLEN/8, x13, x9, x10)

inst_7261:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x358000ff; valaddr_reg:x12; val_offset:21720*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21720*FLEN/8, x13, x9, x10)

inst_7262:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ffff80; valaddr_reg:x12; val_offset:21723*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21723*FLEN/8, x13, x9, x10)

inst_7263:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3580007f; valaddr_reg:x12; val_offset:21726*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21726*FLEN/8, x13, x9, x10)

inst_7264:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ffffc0; valaddr_reg:x12; val_offset:21729*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21729*FLEN/8, x13, x9, x10)

inst_7265:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3580003f; valaddr_reg:x12; val_offset:21732*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21732*FLEN/8, x13, x9, x10)

inst_7266:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35ffffe0; valaddr_reg:x12; val_offset:21735*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21735*FLEN/8, x13, x9, x10)

inst_7267:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3580001f; valaddr_reg:x12; val_offset:21738*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21738*FLEN/8, x13, x9, x10)

inst_7268:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fffff0; valaddr_reg:x12; val_offset:21741*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21741*FLEN/8, x13, x9, x10)

inst_7269:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3580000f; valaddr_reg:x12; val_offset:21744*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21744*FLEN/8, x13, x9, x10)

inst_7270:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fffff8; valaddr_reg:x12; val_offset:21747*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21747*FLEN/8, x13, x9, x10)

inst_7271:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35800007; valaddr_reg:x12; val_offset:21750*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21750*FLEN/8, x13, x9, x10)

inst_7272:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fffffc; valaddr_reg:x12; val_offset:21753*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21753*FLEN/8, x13, x9, x10)

inst_7273:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35800003; valaddr_reg:x12; val_offset:21756*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21756*FLEN/8, x13, x9, x10)

inst_7274:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35fffffe; valaddr_reg:x12; val_offset:21759*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21759*FLEN/8, x13, x9, x10)

inst_7275:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x35800001; valaddr_reg:x12; val_offset:21762*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21762*FLEN/8, x13, x9, x10)

inst_7276:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:21765*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21765*FLEN/8, x13, x9, x10)

inst_7277:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3f800007; valaddr_reg:x12; val_offset:21768*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21768*FLEN/8, x13, x9, x10)

inst_7278:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:21771*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21771*FLEN/8, x13, x9, x10)

inst_7279:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3f800003; valaddr_reg:x12; val_offset:21774*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21774*FLEN/8, x13, x9, x10)

inst_7280:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:21777*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21777*FLEN/8, x13, x9, x10)

inst_7281:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3f800001; valaddr_reg:x12; val_offset:21780*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21780*FLEN/8, x13, x9, x10)

inst_7282:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:21783*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21783*FLEN/8, x13, x9, x10)

inst_7283:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:21786*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21786*FLEN/8, x13, x9, x10)

inst_7284:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3f999999; valaddr_reg:x12; val_offset:21789*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21789*FLEN/8, x13, x9, x10)

inst_7285:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:21792*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21792*FLEN/8, x13, x9, x10)

inst_7286:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:21795*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21795*FLEN/8, x13, x9, x10)

inst_7287:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:21798*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21798*FLEN/8, x13, x9, x10)

inst_7288:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:21801*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21801*FLEN/8, x13, x9, x10)

inst_7289:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:21804*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21804*FLEN/8, x13, x9, x10)

inst_7290:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:21807*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21807*FLEN/8, x13, x9, x10)

inst_7291:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32be0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2dd4d1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32be0d; op2val:0x2dd4d1;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:21810*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21810*FLEN/8, x13, x9, x10)

inst_7292:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36000000; valaddr_reg:x12; val_offset:21813*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21813*FLEN/8, x13, x9, x10)

inst_7293:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367fffff; valaddr_reg:x12; val_offset:21816*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21816*FLEN/8, x13, x9, x10)

inst_7294:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36400000; valaddr_reg:x12; val_offset:21819*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21819*FLEN/8, x13, x9, x10)

inst_7295:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x363fffff; valaddr_reg:x12; val_offset:21822*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21822*FLEN/8, x13, x9, x10)

inst_7296:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36600000; valaddr_reg:x12; val_offset:21825*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21825*FLEN/8, x13, x9, x10)

inst_7297:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x361fffff; valaddr_reg:x12; val_offset:21828*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21828*FLEN/8, x13, x9, x10)

inst_7298:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36700000; valaddr_reg:x12; val_offset:21831*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21831*FLEN/8, x13, x9, x10)

inst_7299:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x360fffff; valaddr_reg:x12; val_offset:21834*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21834*FLEN/8, x13, x9, x10)

inst_7300:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36780000; valaddr_reg:x12; val_offset:21837*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21837*FLEN/8, x13, x9, x10)

inst_7301:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3607ffff; valaddr_reg:x12; val_offset:21840*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21840*FLEN/8, x13, x9, x10)

inst_7302:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367c0000; valaddr_reg:x12; val_offset:21843*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21843*FLEN/8, x13, x9, x10)

inst_7303:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3603ffff; valaddr_reg:x12; val_offset:21846*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21846*FLEN/8, x13, x9, x10)

inst_7304:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367e0000; valaddr_reg:x12; val_offset:21849*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21849*FLEN/8, x13, x9, x10)

inst_7305:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3601ffff; valaddr_reg:x12; val_offset:21852*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21852*FLEN/8, x13, x9, x10)

inst_7306:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367f0000; valaddr_reg:x12; val_offset:21855*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21855*FLEN/8, x13, x9, x10)

inst_7307:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3600ffff; valaddr_reg:x12; val_offset:21858*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21858*FLEN/8, x13, x9, x10)

inst_7308:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367f8000; valaddr_reg:x12; val_offset:21861*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21861*FLEN/8, x13, x9, x10)

inst_7309:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36007fff; valaddr_reg:x12; val_offset:21864*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21864*FLEN/8, x13, x9, x10)

inst_7310:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367fc000; valaddr_reg:x12; val_offset:21867*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21867*FLEN/8, x13, x9, x10)

inst_7311:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36003fff; valaddr_reg:x12; val_offset:21870*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21870*FLEN/8, x13, x9, x10)

inst_7312:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367fe000; valaddr_reg:x12; val_offset:21873*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21873*FLEN/8, x13, x9, x10)

inst_7313:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36001fff; valaddr_reg:x12; val_offset:21876*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21876*FLEN/8, x13, x9, x10)

inst_7314:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367ff000; valaddr_reg:x12; val_offset:21879*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21879*FLEN/8, x13, x9, x10)

inst_7315:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36000fff; valaddr_reg:x12; val_offset:21882*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21882*FLEN/8, x13, x9, x10)

inst_7316:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367ff800; valaddr_reg:x12; val_offset:21885*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21885*FLEN/8, x13, x9, x10)

inst_7317:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x360007ff; valaddr_reg:x12; val_offset:21888*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21888*FLEN/8, x13, x9, x10)

inst_7318:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367ffc00; valaddr_reg:x12; val_offset:21891*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21891*FLEN/8, x13, x9, x10)

inst_7319:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x360003ff; valaddr_reg:x12; val_offset:21894*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21894*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_57)
inst_7320:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367ffe00; valaddr_reg:x12; val_offset:21897*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21897*FLEN/8, x13, x9, x10)

inst_7321:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x360001ff; valaddr_reg:x12; val_offset:21900*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21900*FLEN/8, x13, x9, x10)

inst_7322:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367fff00; valaddr_reg:x12; val_offset:21903*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21903*FLEN/8, x13, x9, x10)

inst_7323:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x360000ff; valaddr_reg:x12; val_offset:21906*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21906*FLEN/8, x13, x9, x10)

inst_7324:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367fff80; valaddr_reg:x12; val_offset:21909*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21909*FLEN/8, x13, x9, x10)

inst_7325:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3600007f; valaddr_reg:x12; val_offset:21912*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21912*FLEN/8, x13, x9, x10)

inst_7326:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367fffc0; valaddr_reg:x12; val_offset:21915*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21915*FLEN/8, x13, x9, x10)

inst_7327:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3600003f; valaddr_reg:x12; val_offset:21918*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21918*FLEN/8, x13, x9, x10)

inst_7328:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367fffe0; valaddr_reg:x12; val_offset:21921*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21921*FLEN/8, x13, x9, x10)

inst_7329:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3600001f; valaddr_reg:x12; val_offset:21924*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21924*FLEN/8, x13, x9, x10)

inst_7330:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367ffff0; valaddr_reg:x12; val_offset:21927*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21927*FLEN/8, x13, x9, x10)

inst_7331:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3600000f; valaddr_reg:x12; val_offset:21930*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21930*FLEN/8, x13, x9, x10)

inst_7332:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367ffff8; valaddr_reg:x12; val_offset:21933*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21933*FLEN/8, x13, x9, x10)

inst_7333:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36000007; valaddr_reg:x12; val_offset:21936*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21936*FLEN/8, x13, x9, x10)

inst_7334:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367ffffc; valaddr_reg:x12; val_offset:21939*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21939*FLEN/8, x13, x9, x10)

inst_7335:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36000003; valaddr_reg:x12; val_offset:21942*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21942*FLEN/8, x13, x9, x10)

inst_7336:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x367ffffe; valaddr_reg:x12; val_offset:21945*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21945*FLEN/8, x13, x9, x10)

inst_7337:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x36000001; valaddr_reg:x12; val_offset:21948*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21948*FLEN/8, x13, x9, x10)

inst_7338:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:21951*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21951*FLEN/8, x13, x9, x10)

inst_7339:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3f800007; valaddr_reg:x12; val_offset:21954*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21954*FLEN/8, x13, x9, x10)

inst_7340:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:21957*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21957*FLEN/8, x13, x9, x10)

inst_7341:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3f800003; valaddr_reg:x12; val_offset:21960*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21960*FLEN/8, x13, x9, x10)

inst_7342:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:21963*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21963*FLEN/8, x13, x9, x10)

inst_7343:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3f800001; valaddr_reg:x12; val_offset:21966*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21966*FLEN/8, x13, x9, x10)

inst_7344:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:21969*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21969*FLEN/8, x13, x9, x10)

inst_7345:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:21972*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21972*FLEN/8, x13, x9, x10)

inst_7346:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3f999999; valaddr_reg:x12; val_offset:21975*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21975*FLEN/8, x13, x9, x10)

inst_7347:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:21978*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21978*FLEN/8, x13, x9, x10)

inst_7348:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:21981*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21981*FLEN/8, x13, x9, x10)

inst_7349:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:21984*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21984*FLEN/8, x13, x9, x10)

inst_7350:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:21987*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21987*FLEN/8, x13, x9, x10)

inst_7351:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:21990*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21990*FLEN/8, x13, x9, x10)

inst_7352:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:21993*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21993*FLEN/8, x13, x9, x10)

inst_7353:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476dcc and fs2 == 0 and fe2 == 0x04 and fm2 == 0x244f27 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc76dcc; op2val:0x2244f27;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:21996*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21996*FLEN/8, x13, x9, x10)

inst_7354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36800000; valaddr_reg:x12; val_offset:21999*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 21999*FLEN/8, x13, x9, x10)

inst_7355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ffffff; valaddr_reg:x12; val_offset:22002*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22002*FLEN/8, x13, x9, x10)

inst_7356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36c00000; valaddr_reg:x12; val_offset:22005*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22005*FLEN/8, x13, x9, x10)

inst_7357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36bfffff; valaddr_reg:x12; val_offset:22008*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22008*FLEN/8, x13, x9, x10)

inst_7358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36e00000; valaddr_reg:x12; val_offset:22011*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22011*FLEN/8, x13, x9, x10)

inst_7359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x369fffff; valaddr_reg:x12; val_offset:22014*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22014*FLEN/8, x13, x9, x10)

inst_7360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36f00000; valaddr_reg:x12; val_offset:22017*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22017*FLEN/8, x13, x9, x10)

inst_7361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x368fffff; valaddr_reg:x12; val_offset:22020*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22020*FLEN/8, x13, x9, x10)

inst_7362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36f80000; valaddr_reg:x12; val_offset:22023*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22023*FLEN/8, x13, x9, x10)

inst_7363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3687ffff; valaddr_reg:x12; val_offset:22026*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22026*FLEN/8, x13, x9, x10)

inst_7364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fc0000; valaddr_reg:x12; val_offset:22029*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22029*FLEN/8, x13, x9, x10)

inst_7365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3683ffff; valaddr_reg:x12; val_offset:22032*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22032*FLEN/8, x13, x9, x10)

inst_7366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fe0000; valaddr_reg:x12; val_offset:22035*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22035*FLEN/8, x13, x9, x10)

inst_7367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3681ffff; valaddr_reg:x12; val_offset:22038*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22038*FLEN/8, x13, x9, x10)

inst_7368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ff0000; valaddr_reg:x12; val_offset:22041*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22041*FLEN/8, x13, x9, x10)

inst_7369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3680ffff; valaddr_reg:x12; val_offset:22044*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22044*FLEN/8, x13, x9, x10)

inst_7370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ff8000; valaddr_reg:x12; val_offset:22047*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22047*FLEN/8, x13, x9, x10)

inst_7371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36807fff; valaddr_reg:x12; val_offset:22050*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22050*FLEN/8, x13, x9, x10)

inst_7372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ffc000; valaddr_reg:x12; val_offset:22053*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22053*FLEN/8, x13, x9, x10)

inst_7373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36803fff; valaddr_reg:x12; val_offset:22056*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22056*FLEN/8, x13, x9, x10)

inst_7374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ffe000; valaddr_reg:x12; val_offset:22059*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22059*FLEN/8, x13, x9, x10)

inst_7375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36801fff; valaddr_reg:x12; val_offset:22062*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22062*FLEN/8, x13, x9, x10)

inst_7376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fff000; valaddr_reg:x12; val_offset:22065*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22065*FLEN/8, x13, x9, x10)

inst_7377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36800fff; valaddr_reg:x12; val_offset:22068*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22068*FLEN/8, x13, x9, x10)

inst_7378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fff800; valaddr_reg:x12; val_offset:22071*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22071*FLEN/8, x13, x9, x10)

inst_7379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x368007ff; valaddr_reg:x12; val_offset:22074*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22074*FLEN/8, x13, x9, x10)

inst_7380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fffc00; valaddr_reg:x12; val_offset:22077*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22077*FLEN/8, x13, x9, x10)

inst_7381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x368003ff; valaddr_reg:x12; val_offset:22080*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22080*FLEN/8, x13, x9, x10)

inst_7382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fffe00; valaddr_reg:x12; val_offset:22083*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22083*FLEN/8, x13, x9, x10)

inst_7383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x368001ff; valaddr_reg:x12; val_offset:22086*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22086*FLEN/8, x13, x9, x10)

inst_7384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ffff00; valaddr_reg:x12; val_offset:22089*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22089*FLEN/8, x13, x9, x10)

inst_7385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x368000ff; valaddr_reg:x12; val_offset:22092*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22092*FLEN/8, x13, x9, x10)

inst_7386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ffff80; valaddr_reg:x12; val_offset:22095*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22095*FLEN/8, x13, x9, x10)

inst_7387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3680007f; valaddr_reg:x12; val_offset:22098*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22098*FLEN/8, x13, x9, x10)

inst_7388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ffffc0; valaddr_reg:x12; val_offset:22101*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22101*FLEN/8, x13, x9, x10)

inst_7389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3680003f; valaddr_reg:x12; val_offset:22104*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22104*FLEN/8, x13, x9, x10)

inst_7390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36ffffe0; valaddr_reg:x12; val_offset:22107*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22107*FLEN/8, x13, x9, x10)

inst_7391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3680001f; valaddr_reg:x12; val_offset:22110*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22110*FLEN/8, x13, x9, x10)

inst_7392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fffff0; valaddr_reg:x12; val_offset:22113*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22113*FLEN/8, x13, x9, x10)

inst_7393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3680000f; valaddr_reg:x12; val_offset:22116*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22116*FLEN/8, x13, x9, x10)

inst_7394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fffff8; valaddr_reg:x12; val_offset:22119*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22119*FLEN/8, x13, x9, x10)

inst_7395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36800007; valaddr_reg:x12; val_offset:22122*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22122*FLEN/8, x13, x9, x10)

inst_7396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fffffc; valaddr_reg:x12; val_offset:22125*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22125*FLEN/8, x13, x9, x10)

inst_7397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36800003; valaddr_reg:x12; val_offset:22128*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22128*FLEN/8, x13, x9, x10)

inst_7398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36fffffe; valaddr_reg:x12; val_offset:22131*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22131*FLEN/8, x13, x9, x10)

inst_7399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x36800001; valaddr_reg:x12; val_offset:22134*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22134*FLEN/8, x13, x9, x10)

inst_7400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:22137*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22137*FLEN/8, x13, x9, x10)

inst_7401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3f800007; valaddr_reg:x12; val_offset:22140*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22140*FLEN/8, x13, x9, x10)

inst_7402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:22143*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22143*FLEN/8, x13, x9, x10)

inst_7403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3f800003; valaddr_reg:x12; val_offset:22146*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22146*FLEN/8, x13, x9, x10)

inst_7404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:22149*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22149*FLEN/8, x13, x9, x10)

inst_7405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3f800001; valaddr_reg:x12; val_offset:22152*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22152*FLEN/8, x13, x9, x10)

inst_7406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:22155*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22155*FLEN/8, x13, x9, x10)

inst_7407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:22158*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22158*FLEN/8, x13, x9, x10)

inst_7408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3f999999; valaddr_reg:x12; val_offset:22161*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22161*FLEN/8, x13, x9, x10)

inst_7409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:22164*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22164*FLEN/8, x13, x9, x10)

inst_7410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:22167*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22167*FLEN/8, x13, x9, x10)

inst_7411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:22170*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22170*FLEN/8, x13, x9, x10)

inst_7412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:22173*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22173*FLEN/8, x13, x9, x10)

inst_7413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:22176*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22176*FLEN/8, x13, x9, x10)

inst_7414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:22179*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22179*FLEN/8, x13, x9, x10)

inst_7415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x352a5c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d37e4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f352a5c; op2val:0x2d37e4;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:22182*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22182*FLEN/8, x13, x9, x10)

inst_7416:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37000000; valaddr_reg:x12; val_offset:22185*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22185*FLEN/8, x13, x9, x10)

inst_7417:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377fffff; valaddr_reg:x12; val_offset:22188*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22188*FLEN/8, x13, x9, x10)

inst_7418:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37400000; valaddr_reg:x12; val_offset:22191*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22191*FLEN/8, x13, x9, x10)

inst_7419:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x373fffff; valaddr_reg:x12; val_offset:22194*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22194*FLEN/8, x13, x9, x10)

inst_7420:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37600000; valaddr_reg:x12; val_offset:22197*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22197*FLEN/8, x13, x9, x10)

inst_7421:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x371fffff; valaddr_reg:x12; val_offset:22200*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22200*FLEN/8, x13, x9, x10)

inst_7422:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37700000; valaddr_reg:x12; val_offset:22203*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22203*FLEN/8, x13, x9, x10)

inst_7423:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x370fffff; valaddr_reg:x12; val_offset:22206*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22206*FLEN/8, x13, x9, x10)

inst_7424:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37780000; valaddr_reg:x12; val_offset:22209*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22209*FLEN/8, x13, x9, x10)

inst_7425:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3707ffff; valaddr_reg:x12; val_offset:22212*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22212*FLEN/8, x13, x9, x10)

inst_7426:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377c0000; valaddr_reg:x12; val_offset:22215*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22215*FLEN/8, x13, x9, x10)

inst_7427:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3703ffff; valaddr_reg:x12; val_offset:22218*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22218*FLEN/8, x13, x9, x10)

inst_7428:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377e0000; valaddr_reg:x12; val_offset:22221*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22221*FLEN/8, x13, x9, x10)

inst_7429:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3701ffff; valaddr_reg:x12; val_offset:22224*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22224*FLEN/8, x13, x9, x10)

inst_7430:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377f0000; valaddr_reg:x12; val_offset:22227*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22227*FLEN/8, x13, x9, x10)

inst_7431:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3700ffff; valaddr_reg:x12; val_offset:22230*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22230*FLEN/8, x13, x9, x10)

inst_7432:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377f8000; valaddr_reg:x12; val_offset:22233*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22233*FLEN/8, x13, x9, x10)

inst_7433:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37007fff; valaddr_reg:x12; val_offset:22236*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22236*FLEN/8, x13, x9, x10)

inst_7434:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377fc000; valaddr_reg:x12; val_offset:22239*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22239*FLEN/8, x13, x9, x10)

inst_7435:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37003fff; valaddr_reg:x12; val_offset:22242*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22242*FLEN/8, x13, x9, x10)

inst_7436:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377fe000; valaddr_reg:x12; val_offset:22245*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22245*FLEN/8, x13, x9, x10)

inst_7437:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37001fff; valaddr_reg:x12; val_offset:22248*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22248*FLEN/8, x13, x9, x10)

inst_7438:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377ff000; valaddr_reg:x12; val_offset:22251*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22251*FLEN/8, x13, x9, x10)

inst_7439:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37000fff; valaddr_reg:x12; val_offset:22254*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22254*FLEN/8, x13, x9, x10)

inst_7440:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377ff800; valaddr_reg:x12; val_offset:22257*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22257*FLEN/8, x13, x9, x10)

inst_7441:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x370007ff; valaddr_reg:x12; val_offset:22260*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22260*FLEN/8, x13, x9, x10)

inst_7442:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377ffc00; valaddr_reg:x12; val_offset:22263*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22263*FLEN/8, x13, x9, x10)

inst_7443:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x370003ff; valaddr_reg:x12; val_offset:22266*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22266*FLEN/8, x13, x9, x10)

inst_7444:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377ffe00; valaddr_reg:x12; val_offset:22269*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22269*FLEN/8, x13, x9, x10)

inst_7445:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x370001ff; valaddr_reg:x12; val_offset:22272*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22272*FLEN/8, x13, x9, x10)

inst_7446:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377fff00; valaddr_reg:x12; val_offset:22275*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22275*FLEN/8, x13, x9, x10)

inst_7447:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x370000ff; valaddr_reg:x12; val_offset:22278*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22278*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_58)
inst_7448:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377fff80; valaddr_reg:x12; val_offset:22281*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22281*FLEN/8, x13, x9, x10)

inst_7449:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3700007f; valaddr_reg:x12; val_offset:22284*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22284*FLEN/8, x13, x9, x10)

inst_7450:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377fffc0; valaddr_reg:x12; val_offset:22287*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22287*FLEN/8, x13, x9, x10)

inst_7451:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3700003f; valaddr_reg:x12; val_offset:22290*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22290*FLEN/8, x13, x9, x10)

inst_7452:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377fffe0; valaddr_reg:x12; val_offset:22293*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22293*FLEN/8, x13, x9, x10)

inst_7453:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3700001f; valaddr_reg:x12; val_offset:22296*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22296*FLEN/8, x13, x9, x10)

inst_7454:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377ffff0; valaddr_reg:x12; val_offset:22299*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22299*FLEN/8, x13, x9, x10)

inst_7455:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3700000f; valaddr_reg:x12; val_offset:22302*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22302*FLEN/8, x13, x9, x10)

inst_7456:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377ffff8; valaddr_reg:x12; val_offset:22305*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22305*FLEN/8, x13, x9, x10)

inst_7457:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37000007; valaddr_reg:x12; val_offset:22308*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22308*FLEN/8, x13, x9, x10)

inst_7458:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377ffffc; valaddr_reg:x12; val_offset:22311*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22311*FLEN/8, x13, x9, x10)

inst_7459:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37000003; valaddr_reg:x12; val_offset:22314*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22314*FLEN/8, x13, x9, x10)

inst_7460:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x377ffffe; valaddr_reg:x12; val_offset:22317*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22317*FLEN/8, x13, x9, x10)

inst_7461:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x37000001; valaddr_reg:x12; val_offset:22320*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22320*FLEN/8, x13, x9, x10)

inst_7462:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:22323*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22323*FLEN/8, x13, x9, x10)

inst_7463:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3f800007; valaddr_reg:x12; val_offset:22326*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22326*FLEN/8, x13, x9, x10)

inst_7464:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:22329*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22329*FLEN/8, x13, x9, x10)

inst_7465:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3f800003; valaddr_reg:x12; val_offset:22332*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22332*FLEN/8, x13, x9, x10)

inst_7466:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:22335*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22335*FLEN/8, x13, x9, x10)

inst_7467:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3f800001; valaddr_reg:x12; val_offset:22338*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22338*FLEN/8, x13, x9, x10)

inst_7468:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:22341*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22341*FLEN/8, x13, x9, x10)

inst_7469:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:22344*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22344*FLEN/8, x13, x9, x10)

inst_7470:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3f999999; valaddr_reg:x12; val_offset:22347*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22347*FLEN/8, x13, x9, x10)

inst_7471:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:22350*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22350*FLEN/8, x13, x9, x10)

inst_7472:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:22353*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22353*FLEN/8, x13, x9, x10)

inst_7473:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:22356*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22356*FLEN/8, x13, x9, x10)

inst_7474:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:22359*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22359*FLEN/8, x13, x9, x10)

inst_7475:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:22362*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22362*FLEN/8, x13, x9, x10)

inst_7476:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:22365*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22365*FLEN/8, x13, x9, x10)

inst_7477:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x586edd and fs2 == 0 and fe2 == 0x03 and fm2 == 0x176670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d586edd; op2val:0x1976670;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:22368*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22368*FLEN/8, x13, x9, x10)

inst_7478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37800000; valaddr_reg:x12; val_offset:22371*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22371*FLEN/8, x13, x9, x10)

inst_7479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ffffff; valaddr_reg:x12; val_offset:22374*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22374*FLEN/8, x13, x9, x10)

inst_7480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37c00000; valaddr_reg:x12; val_offset:22377*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22377*FLEN/8, x13, x9, x10)

inst_7481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37bfffff; valaddr_reg:x12; val_offset:22380*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22380*FLEN/8, x13, x9, x10)

inst_7482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37e00000; valaddr_reg:x12; val_offset:22383*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22383*FLEN/8, x13, x9, x10)

inst_7483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x379fffff; valaddr_reg:x12; val_offset:22386*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22386*FLEN/8, x13, x9, x10)

inst_7484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37f00000; valaddr_reg:x12; val_offset:22389*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22389*FLEN/8, x13, x9, x10)

inst_7485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x378fffff; valaddr_reg:x12; val_offset:22392*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22392*FLEN/8, x13, x9, x10)

inst_7486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37f80000; valaddr_reg:x12; val_offset:22395*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22395*FLEN/8, x13, x9, x10)

inst_7487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3787ffff; valaddr_reg:x12; val_offset:22398*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22398*FLEN/8, x13, x9, x10)

inst_7488:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fc0000; valaddr_reg:x12; val_offset:22401*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22401*FLEN/8, x13, x9, x10)

inst_7489:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3783ffff; valaddr_reg:x12; val_offset:22404*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22404*FLEN/8, x13, x9, x10)

inst_7490:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fe0000; valaddr_reg:x12; val_offset:22407*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22407*FLEN/8, x13, x9, x10)

inst_7491:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3781ffff; valaddr_reg:x12; val_offset:22410*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22410*FLEN/8, x13, x9, x10)

inst_7492:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ff0000; valaddr_reg:x12; val_offset:22413*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22413*FLEN/8, x13, x9, x10)

inst_7493:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3780ffff; valaddr_reg:x12; val_offset:22416*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22416*FLEN/8, x13, x9, x10)

inst_7494:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ff8000; valaddr_reg:x12; val_offset:22419*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22419*FLEN/8, x13, x9, x10)

inst_7495:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37807fff; valaddr_reg:x12; val_offset:22422*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22422*FLEN/8, x13, x9, x10)

inst_7496:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ffc000; valaddr_reg:x12; val_offset:22425*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22425*FLEN/8, x13, x9, x10)

inst_7497:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37803fff; valaddr_reg:x12; val_offset:22428*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22428*FLEN/8, x13, x9, x10)

inst_7498:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ffe000; valaddr_reg:x12; val_offset:22431*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22431*FLEN/8, x13, x9, x10)

inst_7499:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37801fff; valaddr_reg:x12; val_offset:22434*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22434*FLEN/8, x13, x9, x10)

inst_7500:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fff000; valaddr_reg:x12; val_offset:22437*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22437*FLEN/8, x13, x9, x10)

inst_7501:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37800fff; valaddr_reg:x12; val_offset:22440*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22440*FLEN/8, x13, x9, x10)

inst_7502:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fff800; valaddr_reg:x12; val_offset:22443*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22443*FLEN/8, x13, x9, x10)

inst_7503:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x378007ff; valaddr_reg:x12; val_offset:22446*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22446*FLEN/8, x13, x9, x10)

inst_7504:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fffc00; valaddr_reg:x12; val_offset:22449*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22449*FLEN/8, x13, x9, x10)

inst_7505:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x378003ff; valaddr_reg:x12; val_offset:22452*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22452*FLEN/8, x13, x9, x10)

inst_7506:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fffe00; valaddr_reg:x12; val_offset:22455*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22455*FLEN/8, x13, x9, x10)

inst_7507:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x378001ff; valaddr_reg:x12; val_offset:22458*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22458*FLEN/8, x13, x9, x10)

inst_7508:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ffff00; valaddr_reg:x12; val_offset:22461*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22461*FLEN/8, x13, x9, x10)

inst_7509:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x378000ff; valaddr_reg:x12; val_offset:22464*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22464*FLEN/8, x13, x9, x10)

inst_7510:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ffff80; valaddr_reg:x12; val_offset:22467*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22467*FLEN/8, x13, x9, x10)

inst_7511:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3780007f; valaddr_reg:x12; val_offset:22470*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22470*FLEN/8, x13, x9, x10)

inst_7512:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ffffc0; valaddr_reg:x12; val_offset:22473*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22473*FLEN/8, x13, x9, x10)

inst_7513:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3780003f; valaddr_reg:x12; val_offset:22476*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22476*FLEN/8, x13, x9, x10)

inst_7514:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37ffffe0; valaddr_reg:x12; val_offset:22479*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22479*FLEN/8, x13, x9, x10)

inst_7515:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3780001f; valaddr_reg:x12; val_offset:22482*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22482*FLEN/8, x13, x9, x10)

inst_7516:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fffff0; valaddr_reg:x12; val_offset:22485*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22485*FLEN/8, x13, x9, x10)

inst_7517:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3780000f; valaddr_reg:x12; val_offset:22488*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22488*FLEN/8, x13, x9, x10)

inst_7518:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fffff8; valaddr_reg:x12; val_offset:22491*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22491*FLEN/8, x13, x9, x10)

inst_7519:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37800007; valaddr_reg:x12; val_offset:22494*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22494*FLEN/8, x13, x9, x10)

inst_7520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fffffc; valaddr_reg:x12; val_offset:22497*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22497*FLEN/8, x13, x9, x10)

inst_7521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37800003; valaddr_reg:x12; val_offset:22500*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22500*FLEN/8, x13, x9, x10)

inst_7522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37fffffe; valaddr_reg:x12; val_offset:22503*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22503*FLEN/8, x13, x9, x10)

inst_7523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x37800001; valaddr_reg:x12; val_offset:22506*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22506*FLEN/8, x13, x9, x10)

inst_7524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:22509*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22509*FLEN/8, x13, x9, x10)

inst_7525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3f800007; valaddr_reg:x12; val_offset:22512*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22512*FLEN/8, x13, x9, x10)

inst_7526:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:22515*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22515*FLEN/8, x13, x9, x10)

inst_7527:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3f800003; valaddr_reg:x12; val_offset:22518*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22518*FLEN/8, x13, x9, x10)

inst_7528:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:22521*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22521*FLEN/8, x13, x9, x10)

inst_7529:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3f800001; valaddr_reg:x12; val_offset:22524*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22524*FLEN/8, x13, x9, x10)

inst_7530:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:22527*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22527*FLEN/8, x13, x9, x10)

inst_7531:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:22530*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22530*FLEN/8, x13, x9, x10)

inst_7532:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3f999999; valaddr_reg:x12; val_offset:22533*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22533*FLEN/8, x13, x9, x10)

inst_7533:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:22536*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22536*FLEN/8, x13, x9, x10)

inst_7534:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:22539*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22539*FLEN/8, x13, x9, x10)

inst_7535:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:22542*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22542*FLEN/8, x13, x9, x10)

inst_7536:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:22545*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22545*FLEN/8, x13, x9, x10)

inst_7537:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:22548*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22548*FLEN/8, x13, x9, x10)

inst_7538:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:22551*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22551*FLEN/8, x13, x9, x10)

inst_7539:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26abc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312695 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f26abc5; op2val:0x312695;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:22554*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22554*FLEN/8, x13, x9, x10)

inst_7540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38000000; valaddr_reg:x12; val_offset:22557*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22557*FLEN/8, x13, x9, x10)

inst_7541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387fffff; valaddr_reg:x12; val_offset:22560*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22560*FLEN/8, x13, x9, x10)

inst_7542:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38400000; valaddr_reg:x12; val_offset:22563*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22563*FLEN/8, x13, x9, x10)

inst_7543:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x383fffff; valaddr_reg:x12; val_offset:22566*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22566*FLEN/8, x13, x9, x10)

inst_7544:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38600000; valaddr_reg:x12; val_offset:22569*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22569*FLEN/8, x13, x9, x10)

inst_7545:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x381fffff; valaddr_reg:x12; val_offset:22572*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22572*FLEN/8, x13, x9, x10)

inst_7546:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38700000; valaddr_reg:x12; val_offset:22575*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22575*FLEN/8, x13, x9, x10)

inst_7547:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x380fffff; valaddr_reg:x12; val_offset:22578*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22578*FLEN/8, x13, x9, x10)

inst_7548:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38780000; valaddr_reg:x12; val_offset:22581*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22581*FLEN/8, x13, x9, x10)

inst_7549:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3807ffff; valaddr_reg:x12; val_offset:22584*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22584*FLEN/8, x13, x9, x10)

inst_7550:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387c0000; valaddr_reg:x12; val_offset:22587*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22587*FLEN/8, x13, x9, x10)

inst_7551:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3803ffff; valaddr_reg:x12; val_offset:22590*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22590*FLEN/8, x13, x9, x10)

inst_7552:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387e0000; valaddr_reg:x12; val_offset:22593*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22593*FLEN/8, x13, x9, x10)

inst_7553:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3801ffff; valaddr_reg:x12; val_offset:22596*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22596*FLEN/8, x13, x9, x10)

inst_7554:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387f0000; valaddr_reg:x12; val_offset:22599*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22599*FLEN/8, x13, x9, x10)

inst_7555:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3800ffff; valaddr_reg:x12; val_offset:22602*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22602*FLEN/8, x13, x9, x10)

inst_7556:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387f8000; valaddr_reg:x12; val_offset:22605*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22605*FLEN/8, x13, x9, x10)

inst_7557:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38007fff; valaddr_reg:x12; val_offset:22608*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22608*FLEN/8, x13, x9, x10)

inst_7558:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387fc000; valaddr_reg:x12; val_offset:22611*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22611*FLEN/8, x13, x9, x10)

inst_7559:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38003fff; valaddr_reg:x12; val_offset:22614*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22614*FLEN/8, x13, x9, x10)

inst_7560:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387fe000; valaddr_reg:x12; val_offset:22617*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22617*FLEN/8, x13, x9, x10)

inst_7561:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38001fff; valaddr_reg:x12; val_offset:22620*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22620*FLEN/8, x13, x9, x10)

inst_7562:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387ff000; valaddr_reg:x12; val_offset:22623*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22623*FLEN/8, x13, x9, x10)

inst_7563:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38000fff; valaddr_reg:x12; val_offset:22626*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22626*FLEN/8, x13, x9, x10)

inst_7564:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387ff800; valaddr_reg:x12; val_offset:22629*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22629*FLEN/8, x13, x9, x10)

inst_7565:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x380007ff; valaddr_reg:x12; val_offset:22632*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22632*FLEN/8, x13, x9, x10)

inst_7566:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387ffc00; valaddr_reg:x12; val_offset:22635*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22635*FLEN/8, x13, x9, x10)

inst_7567:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x380003ff; valaddr_reg:x12; val_offset:22638*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22638*FLEN/8, x13, x9, x10)

inst_7568:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387ffe00; valaddr_reg:x12; val_offset:22641*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22641*FLEN/8, x13, x9, x10)

inst_7569:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x380001ff; valaddr_reg:x12; val_offset:22644*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22644*FLEN/8, x13, x9, x10)

inst_7570:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387fff00; valaddr_reg:x12; val_offset:22647*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22647*FLEN/8, x13, x9, x10)

inst_7571:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x380000ff; valaddr_reg:x12; val_offset:22650*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22650*FLEN/8, x13, x9, x10)

inst_7572:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387fff80; valaddr_reg:x12; val_offset:22653*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22653*FLEN/8, x13, x9, x10)

inst_7573:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3800007f; valaddr_reg:x12; val_offset:22656*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22656*FLEN/8, x13, x9, x10)

inst_7574:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387fffc0; valaddr_reg:x12; val_offset:22659*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22659*FLEN/8, x13, x9, x10)

inst_7575:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3800003f; valaddr_reg:x12; val_offset:22662*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22662*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_59)
inst_7576:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387fffe0; valaddr_reg:x12; val_offset:22665*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22665*FLEN/8, x13, x9, x10)

inst_7577:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3800001f; valaddr_reg:x12; val_offset:22668*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22668*FLEN/8, x13, x9, x10)

inst_7578:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387ffff0; valaddr_reg:x12; val_offset:22671*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22671*FLEN/8, x13, x9, x10)

inst_7579:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3800000f; valaddr_reg:x12; val_offset:22674*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22674*FLEN/8, x13, x9, x10)

inst_7580:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387ffff8; valaddr_reg:x12; val_offset:22677*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22677*FLEN/8, x13, x9, x10)

inst_7581:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38000007; valaddr_reg:x12; val_offset:22680*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22680*FLEN/8, x13, x9, x10)

inst_7582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387ffffc; valaddr_reg:x12; val_offset:22683*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22683*FLEN/8, x13, x9, x10)

inst_7583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38000003; valaddr_reg:x12; val_offset:22686*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22686*FLEN/8, x13, x9, x10)

inst_7584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x387ffffe; valaddr_reg:x12; val_offset:22689*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22689*FLEN/8, x13, x9, x10)

inst_7585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x38000001; valaddr_reg:x12; val_offset:22692*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22692*FLEN/8, x13, x9, x10)

inst_7586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:22695*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22695*FLEN/8, x13, x9, x10)

inst_7587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3f800007; valaddr_reg:x12; val_offset:22698*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22698*FLEN/8, x13, x9, x10)

inst_7588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:22701*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22701*FLEN/8, x13, x9, x10)

inst_7589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3f800003; valaddr_reg:x12; val_offset:22704*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22704*FLEN/8, x13, x9, x10)

inst_7590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:22707*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22707*FLEN/8, x13, x9, x10)

inst_7591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3f800001; valaddr_reg:x12; val_offset:22710*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22710*FLEN/8, x13, x9, x10)

inst_7592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:22713*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22713*FLEN/8, x13, x9, x10)

inst_7593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:22716*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22716*FLEN/8, x13, x9, x10)

inst_7594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3f999999; valaddr_reg:x12; val_offset:22719*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22719*FLEN/8, x13, x9, x10)

inst_7595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:22722*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22722*FLEN/8, x13, x9, x10)

inst_7596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:22725*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22725*FLEN/8, x13, x9, x10)

inst_7597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:22728*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22728*FLEN/8, x13, x9, x10)

inst_7598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:22731*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22731*FLEN/8, x13, x9, x10)

inst_7599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:22734*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22734*FLEN/8, x13, x9, x10)

inst_7600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:22737*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22737*FLEN/8, x13, x9, x10)

inst_7601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2df397 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5e2fe9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eadf397; op2val:0x5e2fe9;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:22740*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22740*FLEN/8, x13, x9, x10)

inst_7602:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38800000; valaddr_reg:x12; val_offset:22743*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22743*FLEN/8, x13, x9, x10)

inst_7603:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38ffffff; valaddr_reg:x12; val_offset:22746*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22746*FLEN/8, x13, x9, x10)

inst_7604:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38c00000; valaddr_reg:x12; val_offset:22749*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22749*FLEN/8, x13, x9, x10)

inst_7605:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38bfffff; valaddr_reg:x12; val_offset:22752*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22752*FLEN/8, x13, x9, x10)

inst_7606:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38e00000; valaddr_reg:x12; val_offset:22755*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22755*FLEN/8, x13, x9, x10)

inst_7607:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x389fffff; valaddr_reg:x12; val_offset:22758*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22758*FLEN/8, x13, x9, x10)

inst_7608:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38f00000; valaddr_reg:x12; val_offset:22761*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22761*FLEN/8, x13, x9, x10)

inst_7609:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x388fffff; valaddr_reg:x12; val_offset:22764*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22764*FLEN/8, x13, x9, x10)

inst_7610:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38f80000; valaddr_reg:x12; val_offset:22767*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22767*FLEN/8, x13, x9, x10)

inst_7611:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x3887ffff; valaddr_reg:x12; val_offset:22770*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22770*FLEN/8, x13, x9, x10)

inst_7612:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38fc0000; valaddr_reg:x12; val_offset:22773*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22773*FLEN/8, x13, x9, x10)

inst_7613:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x3883ffff; valaddr_reg:x12; val_offset:22776*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22776*FLEN/8, x13, x9, x10)

inst_7614:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38fe0000; valaddr_reg:x12; val_offset:22779*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22779*FLEN/8, x13, x9, x10)

inst_7615:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x3881ffff; valaddr_reg:x12; val_offset:22782*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22782*FLEN/8, x13, x9, x10)

inst_7616:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38ff0000; valaddr_reg:x12; val_offset:22785*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22785*FLEN/8, x13, x9, x10)

inst_7617:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x3880ffff; valaddr_reg:x12; val_offset:22788*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22788*FLEN/8, x13, x9, x10)

inst_7618:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38ff8000; valaddr_reg:x12; val_offset:22791*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22791*FLEN/8, x13, x9, x10)

inst_7619:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38807fff; valaddr_reg:x12; val_offset:22794*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22794*FLEN/8, x13, x9, x10)

inst_7620:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38ffc000; valaddr_reg:x12; val_offset:22797*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22797*FLEN/8, x13, x9, x10)

inst_7621:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38803fff; valaddr_reg:x12; val_offset:22800*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22800*FLEN/8, x13, x9, x10)

inst_7622:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38ffe000; valaddr_reg:x12; val_offset:22803*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22803*FLEN/8, x13, x9, x10)

inst_7623:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38801fff; valaddr_reg:x12; val_offset:22806*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22806*FLEN/8, x13, x9, x10)

inst_7624:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38fff000; valaddr_reg:x12; val_offset:22809*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22809*FLEN/8, x13, x9, x10)

inst_7625:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38800fff; valaddr_reg:x12; val_offset:22812*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22812*FLEN/8, x13, x9, x10)

inst_7626:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38fff800; valaddr_reg:x12; val_offset:22815*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22815*FLEN/8, x13, x9, x10)

inst_7627:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x388007ff; valaddr_reg:x12; val_offset:22818*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22818*FLEN/8, x13, x9, x10)

inst_7628:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x389381 and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cbbf; op2val:0x389381;
op3val:0x38fffc00; valaddr_reg:x12; val_offset:22821*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 22821*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1065353217,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1068948333,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1072543451,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1067030937,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1072064102,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1069267899,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1069827140,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1067749961,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1071345078,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1068708659,32,FLEN)
NAN_BOXED(2129918852,32,FLEN)
NAN_BOXED(4400897,32,FLEN)
NAN_BOXED(1070386380,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638016,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026623,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(859832320,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(859832319,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(861929472,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(857735167,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(862978048,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(856686591,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(863502336,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(856162303,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(863764480,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855900159,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(863895552,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855769087,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(863961088,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855703551,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(863993856,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855670783,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864010240,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855654399,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864018432,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855646207,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864022528,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855642111,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864024576,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855640063,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864025600,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855639039,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026112,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638527,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026368,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638271,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026496,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638143,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026560,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638079,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026592,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638047,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026608,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638031,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026616,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638023,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026620,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638019,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(864026622,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(855638017,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1073741816,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1065353223,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1073741820,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1065353219,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1073741822,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1065353217,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1068948333,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1072543451,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1067030937,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1072064102,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1069267899,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1069827140,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1067749961,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1071345078,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1068708659,32,FLEN)
NAN_BOXED(2127789450,32,FLEN)
NAN_BOXED(5077024,32,FLEN)
NAN_BOXED(1070386380,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864026624,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872415231,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(868220928,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(868220927,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(870318080,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(866123775,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(871366656,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(865075199,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(871890944,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864550911,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872153088,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864288767,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872284160,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864157695,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872349696,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864092159,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872382464,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864059391,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872398848,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864043007,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872407040,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864034815,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872411136,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864030719,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872413184,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864028671,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872414208,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864027647,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872414720,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864027135,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872414976,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864026879,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872415104,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864026751,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872415168,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864026687,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872415200,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(864026655,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
NAN_BOXED(15467092,32,FLEN)
NAN_BOXED(872415216,32,FLEN)
NAN_BOXED(2114639763,32,FLEN)
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NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947913215,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(956301056,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947912959,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(956301184,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947912831,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(956301248,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947912767,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(956301280,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947912735,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(956301296,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947912719,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(956301304,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947912711,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(956301308,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947912707,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(956301310,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(947912705,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1073741816,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1065353223,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1073741820,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1065353219,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1073741822,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1065353217,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1068948333,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1072543451,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1067030937,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1072064102,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1069267899,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1069827140,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1067749961,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1071345078,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1068708659,32,FLEN)
NAN_BOXED(2131807167,32,FLEN)
NAN_BOXED(3707777,32,FLEN)
NAN_BOXED(1070386380,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(956301312,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(964689919,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(960495616,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(960495615,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(962592768,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(958398463,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(963641344,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(957349887,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(964165632,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(956825599,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(964427776,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(956563455,32,FLEN)
NAN_BOXED(2119693699,32,FLEN)
NAN_BOXED(9943939,32,FLEN)
NAN_BOXED(964558848,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
